In a parallel time-interleaved data sampling system, timing and amplitude mismatches of this structure degrade the performance of the whole ADC system. In this paper, an adaptive blind synthesis calibration algorithm is proposed, which could estimate the timing, gain and offset errors simultaneously, and calibrate automatically. With no need of an extra calibration signal and redesign, it could efficiently and dynamically track the changes of mismatches due to aging or temperature variation. A fractional delay filter is developed to adjust the timing mismatch, which simplifies the design and decreases the cost. Computer simulations are also included to demonstrate the effectiveness of the proposed method.
Time-interleaved analog-to-digital converter (ADC) architecture is crucial to increase the maximum sample rate. However, offset mismatch, gain mismatch, and timing error between time-interleaved channels degrade the performance of time-interleaved ADCs. This paper focuses on the gain mismatch and timing error. Techniques based on Discrete Fourier Transform (DFT) for estimating and correcting gain mismatch and timing error in an M-channel ADC are depicted. Numerical simulations are used to verify the proposed estimation and correction algorithm.