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Abstract

In this paper, the PLC-based (Programmable Logic Controller) industrial implementation in the form of the general-purpose function block for ADRC (Active Disturbance Rejection Controller) is presented. The details of practical aspects are discussed because their reliable implementation is not trivial for higher order ADRC. Additional important novelties discussed in the paper are the impact of the derivative backoff and the method that significantly simplifies tuning of higher order ADRC by avoiding the usual trial and error procedure. The results of the practical validation of the suggested concepts complete the paper and show the potential industrial applicability of ADRC.
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Abstract

The paper describes a prototype operator panel, which was designed to operate with the S7-200 family of Programmable Logic Controllers (PLC-s) from Siemens. Most of the functionality of the operator panel was implemented in a computer program, which runs on a PC-class computer. The program communicates with a PLC through its communication port configured in the Freeport mode. Two kinds of interface between the PC, and the PLC are supported: wired, and wireless. For wired connection a standard PC/PPI cable supplied by Siemens is used. For wireless connection two communication modules were designed, which operate in the free 433 MHz band. The operator panel program is intuitive, and easy to use. States of PLC inputs and outputs are presented using graphical objects. It is possible to modify states of the outputs, and monitor and edit any variable in the M and V memory in the PLC. The application supports also alarming. The program can be run on any computer with the MS Windows operating system installed. This makes the solution very cost-effective. Providing both wired and wireless communication radically increases flexibility of the proposed solution. The panel can be quickly mounted in areas, where pulling new cables is inconvenient, difficult or expensive.
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Abstract

The dual core bit-byte CPU must be equipped with properly designed circuits, providing interface between the two processor units, and making it possible to exploit all its advantages like versatility of the byte unit and speed of the bit unit. First of all, the interface circuits should be designed in such a way, that they don’t disturb maximally parallel operation of the units, and that the CPU as a whole works in the same manner as in a standard PLC. The paper presents hardware solutions supporting effective operation of PLC CPU-s. Possibilities of solving problems concerning data exchange between a CPU and peripheral circuits were presented, with a special stress on timers and counters, and also on data exchange between the bit unit and the byte unit. The objective of the proposed solutions is to decrease the time necessary for a CPU to access its peripheries.
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